Integrated Circuit Failure Analysis – A Guide to Preparation Techniques Beck

Integrated Circuit Failure AnalysisA Guide to Preparation Techniques\nAuthor(s): Friedrich Beck\nFormat: Hardback\nPublisher: John Wiley & Sons Inc, United States\nImprint: John Wiley & Sons Inc\nISBN-13: 9780471974017, 978-0471974017\nSynopsis\nFault analysis of highly-integrated semiconductor circuits has become an indispensable discipline in the optimization of product quality. Integrated Circuit Failure Analysis describes state-of-the-art procedures for exposing suspected failure sites in semiconductor devices. The author adopts a hands-on problem-oriented approach, founded on many years of practical experience, complemented by the explanation of basic theoretical principles. Features include: Advanced methods in device preparation and technical procedures for package inspection and semiconductor reliability. Illustration of chip isolation and step-by-step delayering of chips by wet chemical and modern plasma dry etching techniques. Particular analysis of bipolar and MOS .